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- To: srfi-70@xxxxxxxxxxxxxxxxx
- Subject: FP Hardware
- From: Noel Welsh <noelwelsh@xxxxxxxxx>
- Date: Thu, 19 May 2005 07:45:15 -0700 (PDT)
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- Delivered-to: srfi-70@xxxxxxxxxxxxxxxxx
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> Reducing the precision of scalar operands nets no speed
> increase from floating-point hardware.
This is not the case in general. The action in floating
point calculations is currently in the vector units (SSE2,
AltiVec) found in modern processors. Indeed the Pentium 4s
scalar floating point unit is dismal, often making the
vector unit the preferred path for even scalar floating
point code! Vector units generally have fixed size
registers (e.g. 128-bits) meaning you can either achieve a
4x speedup on single floats (32-bits) or 2x on doubles
(64-bits). What I've read of the Cell processor suggests
it may only have vectorised FP units. Hence allowing the
user to specify precision seems like a good move.
Email: noelwelsh <at> yahoo <dot> com
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